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2d4f0ac440
Implements AV1 and HEVC according to enhanced RTMP spec found at https://github.com/veovera/enhanced-rtmp Co-authored-by: derrod <dennis@obsproject.com>
73 lines
1.3 KiB
C
73 lines
1.3 KiB
C
#pragma once
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#if defined(__GNUC__) || defined(__clang__)
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static inline uint32_t clz32(unsigned long val)
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{
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return __builtin_clz(val);
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}
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static inline uint32_t ctz32(unsigned long val)
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{
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return __builtin_ctz(val);
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}
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#elif defined(_MSC_VER) && _MSC_VER >= 1400
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static inline uint32_t clz32(unsigned long val)
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{
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/* __lzcnt() / _lzcnt_u32() do not work correctly on older Intel CPUs,
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* so use BSR instead for better compatibility. */
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uint32_t zeros = 0;
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_BitScanReverse(&zeros, val);
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return 31 - zeros;
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}
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static inline uint32_t ctz32(unsigned long val)
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{
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return _tzcnt_u32(val);
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}
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#else
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static uint32_t popcnt(uint32_t x)
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{
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x -= ((x >> 1) & 0x55555555);
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x = (((x >> 2) & 0x33333333) + (x & 0x33333333));
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x = (((x >> 4) + x) & 0x0f0f0f0f);
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x += (x >> 8);
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x += (x >> 16);
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return x & 0x0000003f;
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}
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static uint32_t clz32(uint32_t x)
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{
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x |= (x >> 1);
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x |= (x >> 2);
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x |= (x >> 4);
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x |= (x >> 8);
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x |= (x >> 16);
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return 32 - popcnt(x);
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}
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static uint32_t ctz32(uint32_t x)
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{
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return popcnt((x & -x) - 1);
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}
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#endif
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static inline uint32_t min_u32(uint32_t a, uint32_t b)
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{
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return (a < b) ? a : b;
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}
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static inline uint16_t min_u16(uint16_t a, uint16_t b)
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{
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return (a < b) ? a : b;
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}
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static inline int32_t min_i32(int32_t a, int32_t b)
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{
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return (a < b) ? a : b;
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}
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static inline uint8_t max_u8(uint8_t a, uint8_t b)
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{
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return (a > b) ? a : b;
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}
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